1. Field of the Invention
The present invention relates to a semiconductor memory circuit, and in particular, to a sense amplifier circuit system used for dynamic RAM (random access memory).
2. Description of the related Art
For example, dynamic RAM has been used as a semiconductor memory circuit which stores digital information in memory, and which reads and transmits this digital information therefrom to an external apparatus as necessary. This dynamic RAM is a semiconductor device having a plurality of memory cells into which data is stored. Each of the memory cells is composed of a transistor and a memory capacitor, and indicates "0" or "1", depending upon whether a charge is present in the memory capacitor or not. Further, this transistor is connected with bit lines (data lines) and word lines through which information is read or written. That is, when data stored in a memory cell is read out, the word lines are applied with a high voltage so as to turn on the transistor in order to detect a charge in a memory capacitor through a bit line. Further, in the case of writing, the memory capacitor is charged through the bit line. With such a dynamic cell type memory device, the charge in the memory capacitor can be held by setting the word line to a low voltage so as to turn off the transistor. However, since this charge is gradually reduced due to a slight leakage of current. Accordingly, the dynamic RAM is subjected to a refresh (rewriting) at intervals of a predetermined time in order to replenish the reduced charge. In the dynamic RAM, since a charge to be detected is small, there is used a peculiar amplifier circuit which is so-called sense amplifier and which can read with a high sensitivity and a high speed, and can be refreshed. This amplifier is connected with, for example, a pair of bit lines which are connected with memory cells, respectively.
Meanwhile, in these years, the degree of circuit integration has been rapidly enhanced due to the progress of fine work technology so as to attain a high capacity and a high performance. However, this involves various kinds of problems. For example, the attainment of high density due to large-scale circuit integration causes small pitches of bit lines, resulting in increase in coupling capacity between a pair of bit lines themselves and between adjacent bit lines. Accordingly, when an information is read out through a bit line from a memory cell, the memory cell to be sensed and amplified is directly influenced by a swing of an adjacent bit line. When the information stored in the memory cell is inverted due to the influence by the adjacent bit line, the transmission of the information cannot be precisely made, causing erroneous operation in a system using a dynamic RAM. For example, Japanese Laid-Open Patent No. 61-255591 discloses a conventional technology in which the potential between the adjacent bit lines are fixed to reduce the influence of the capacity between the adjacent bit lines, thereby eliminating the above-mentioned problem. However, in such a conventional technology, the reading/rewriting should be carried out through a pair of bit lines connected to the sense amplifier even though only one memory cell is read. Accordingly, a bit line which is not used for writing swings and extra current for charging and discharging runs therethrough. Thus, there has been such a problem that not only the consumption current is increased but also the amplifying operation of the sense amplifier is retarded.